
C8051F380/1/2/3/4/5/6/7/C
Table 22.6. SMBus Status Decoding: Hardware ACK Enabled (EHACK = 1) (Continued)
Values Read
Current SMbus State
Typical Response Options
Values to
Write
Set ACK for next data byte;
0
0
1
1000
Read SMB0DAT.
Set NACK to indicate next data
0
0
0
1000
0
0
1
A master data byte was
received; ACK sent.
byte as the last data byte;
Read SMB0DAT.
Initiate repeated START.
1
0
0
1110
1000
Switch to Master Transmitter
Mode (write to SMB0DAT before
clearing SI).
0
0 X
1100
Read SMB0DAT; send STOP.
Read SMB0DAT; Send STOP
0
1
1
1
0
0
—
1110
A master data byte was
followed by START.
0
0
0 received; NACK sent (last
byte).
Initiate repeated START.
Switch to Master Transmitter
1
0
0 0
0 X
1110
1100
Mode (write to SMB0DAT before
clearing SI).
0
0
0
A slave byte was transmitted; No action required (expecting
NACK received. STOP condition).
0
0 X
0001
0100
0
0
1
A slave byte was transmitted; Load SMB0DAT with next data
ACK received. byte to transmit.
0
0 X
0100
0
1 X
A Slave byte was transmitted; No action required (expecting
error detected. Master to end transfer).
An illegal STOP or bus error
0
0
0 X
0 X
0001
—
0101
0 X X was detected while a Slave
Transmission was in progress.
Clear STO.
230
Rev. 1.4